This invention relates to a self-refreshing semiconductor memory with circuits for testing the refresh timer.
Generally referred to as a pseudo-static random-access memory or a virtual-static random-access memory, a self-refreshing memory has dynamic memory cells that require periodic refreshing, and also has circuits that refresh the memory cells at intervals controlled by a built-in timer. The growing demand for a self-refreshing memory, which combines the ease of use of a static random-access memory (SRAM) with the low cost of a dynamic random-access memory (DRAM), has made it necessary to produce and test self-refreshing memory devices in large quantities. One of the tests that must be performed is a test of the built-in timer, to verify that it generates refresh request signals at a rate fast enough to refresh all memory cells before loss of data occurs. If the built-in timer is suitably programmable, the results of this test can also be used to adjust the timer to the optimum rate, so that current is not wasted by refreshing more often than necessary.
One prior-art method of performing this test is to output the refresh request signals at a test pin and measure their frequency. A disadvantage of this method is that automatic memory test equipment is not normally designed for frequency measurements, so the test must be carried out with a separate instrument such as a frequency counter. The inability to use automatic test equipment makes this test method impractical for volume production.
Another prior-art method is to write a certain data pattern in the memory device, then pause for an interval longer than the data retention time of the memory cells, then read the data from all memory cells. If the built-in timer is producing refresh requests at the necessary rate, the same data should be read as was written into the memory cells. The test is normally performed twice, using different data patterns. Although this test can be carried out by automatic test equipment, it has the disadvantage that if the memory capacity is large, it takes considerable time to read and write all memory cells. In the case of a sixteen-megabit memory, for example, a two-pattern test takes fifteen seconds.